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MAX1162
16-Bit, +5V, 200ksps ADC with 10A
Shutdown
______________________________________________________________________________________
17
Constraints on sequencing the power supplies and
inputs are as follows:
Apply AGND before DGND.
Apply AIN and REF after AVDD and AGND
are present.
DVDD is independent of the supply sequencing.
Ensure that digital return currents do not pass through
the analog ground and that return-current paths are low
impedance. A 5mA current flowing through a PC board
ground trace impedance of only 0.05Ω creates an error
voltage of about 250V, 4LSB error with a +4V full-
scale system.
The board layout should ensure that digital and analog
signal lines are kept separate. Do not run analog and
digital (especially the SCLK and DOUT) lines parallel to
one another. If one must cross another, do so at right
angles.
The ADCs high-speed comparator is sensitive to high-
frequency noise on the AVDD power supply. Bypass an
excessively noisy supply to the analog ground plane
with a 0.1F capacitor in parallel with a 1F to 10F
low-ESR capacitor. Keep capacitor leads short for best
supply-noise rejection.
AIN
TRACK AND
HOLD
16-BIT SAR
ADC
CONTROL
DVDD
DGND
CS
AGND
AVDD
REF
DOUT
SCLK
MAX1162
OUTPUT
BUFFER
Functional Diagram
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in
the package code indicates RoHS status only. Package draw-
ings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
10 MAX
U10-2
21-0061
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